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53 segment static dr iver S6A0035 1 introduction the S6A0035 is a general purpose lcd driving ic, and designed to be available for electronic frequency tuning display applications or microcomputer application systems. features maximum 53 segment output fo r static display drive system:1/1 duty ? 53 segments 1/2 duty ? 104 segments 3 - input pins for serial data tra nsfer (ce, ck, di ) 2 - pin for 5 - level ad converter (ari, ali) 2 display pins for direct displaying (dsp1, dsp2 ) inh pin for blinking out display block diag ram common driver clock generator latch & segment driver ( 1 - 56 bits) latch & segment driver ( 57 - 112 bits) shift register (56 bits) & function decoder adc adc v lcd osc inh v dd v ss ce ck di s45 (ali) s47 (ari) com2 com1 * s44 (dsp2) * s46 (dsp1) * s48 (dsp out) * s49 - s53 (arlo1 - arlo5) s1 ...... ...... s53 s52 s51 s50 s49 s48 s46 s45 s44 s43
S6A0035 53 segment static driver 2 pad diagram S6A0035 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 chip size: 2380 2980 pad size: 99 99 pad pitch: 125 unit: m m 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 s32 s33 s34 s35 s36 s37 s38 s39 s40 s41 s42 s43 s44 s45 s46 s47 x (0, 0) y s48 s49 s50 s51 s52 s53 osc vdd inh vlcd vss ce ck di com2 com1 s16 s15 s14 s13 s12 s11 s10 s9 s8 s7 s6 s5 s4 s3 s2 s1 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 s31 s30 s29 s28 s27 s26 s25 s24 s23 s22 s21 s20 s19 s18 s17 * there is mark of S6A0035 on the center in chip.
53 segment static dr iver S6A0035 3 64 qfp pin configuratio n 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 s48 s49 s50 s51 s52 s53 osc v dd inh v lcd v ss ce ck di com2 com1 S6A0035 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 s31 s30 s29 s28 s27 s26 s25 nc s24 s23 s22 s21 s20 s19 s18 s17 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 s47 s46 s45 s44 s43 s42 s41 s40 s39 s38 s37 s36 s35 s34 s33 s32 s1 s2 s3 s4 s5 s6 s7 s8 s9 s10 s11 s12 s13 s14 s15 s16 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
S6A0035 53 segment static driver 4 pad center coordinat es unit: um pad pad coordinate pad pad coordinate number name x y numbe r name x y 1 s48 - 960 - 1265 33 s17 885 1265 2 s49 - 835 - 1265 34 s18 760 1265 3 s50 - 710 - 1265 35 s19 635 1265 4 s51 - 585 - 1265 36 s20 510 1265 5 s52 - 460 - 1265 37 s21 385 1265 6 s53 - 335 - 1265 38 s22 260 1265 7 osc - 140 - 1265 39 s23 135 1265 8 v dd - 15 - 1265 40 s24 10 1265 9 /inh 110 - 1265 41 s25 - 115 1265 10 v lcd 235 - 1265 42 s26 - 240 1265 11 v ss 360 - 1265 43 s27 - 365 1265 12 ce 485 - 1265 44 s28 - 490 1265 13 ck 610 - 1265 45 s29 - 615 1265 14 di 735 - 1265 46 s30 - 740 1265 15 com2 860 - 1265 47 s31 - 865 1265 16 com1 985 - 1265 48 s32 - 965 940 17 s1 965 - 970 49 s33 - 965 815 18 s2 965 - 845 50 s34 - 965 690 1 9 s3 965 - 720 51 s35 - 965 565 20 s4 965 - 595 52 s36 - 965 440 21 s5 965 - 470 53 s37 - 965 315 22 s6 965 - 345 54 s38 - 965 190 23 s7 965 - 220 55 s39 - 965 65 24 s8 965 - 95 56 s40 - 965 - 60 25 s9 965 30 57 s41 - 965 - 185 26 s10 965 155 58 s42 - 965 - 310 27 s11 965 280 59 s43 - 965 - 435 28 s12 965 405 60 s44 - 965 - 560 29 s13 965 530 61 s45 - 965 - 685 30 s14 965 655 62 s46 - 965 - 810 31 s15 965 780 63 s47 - 965 - 935 32 s16 965 905
53 segment static dr iver S6A0035 5 pad description pad i/o name description interface v dd operating voltag e for logic circuit (2.7v to 6.5v) v ss power 0 v (gnd) power supply v lcd driver supply voltage power supply for driving lcd com1, com2 output common output - 1/1duty: only com1 is used, com2 open - 1/2duty: both com1 and com2 are used. lcd s1 - s43 output segment output segment output for driving lcd lcd s46(dsp1) s44(dsp2) output input segment output dsp input segment output for driving lcd (display input pins) lcd display input s47(ari) s45(ali) output input segment output analog input segment ou tput for driving lcd (analog input pins) lcd analog input s48 (dspout) output segment output dsp output segment output for driving lcd (dsp output pins) lcd s49 - s53 (arlo1 - 5) output segment output analog output segment output for driving lcd (analog out put pins) lcd osc input oscillator input for clock generator resistor, capacitor ce input chip enable ce = high ? chip enable status controller ck input data shift clock clock pulse input for the 1bit serial shift regist er. the data is shifted to 56 bit shift register at the rising edge of the clock. controller di input data input display data input controller inh input display blinking display blinking input (inh = low) controller
S6A0035 53 segment static driver 6 maximum absolute lim it (ta = 25 c, v ss = 0v) characteristic symbol value applicable pin unit maximum supply voltage v dd max - 0.3 to +7.0 v dd v v lcd max - 0.3 to v dd + 0.3 v lcd v input voltage v in1 - 0.3 to v dd + 0.3 ce, ck, di, inh v v in2 - 0.3 to v dd + 0 .3 s44 ~ s47 output off (used as ari, ali dsp1, dsp2) v v in3 - 0.3 to v dd + 0.3 osc, output off v output voltage v o - 0.3 to v dd + 0.3 osc, output off v output current i o1 100 s1 ~ s53 m a i o2 1.0 com1, com2 ma allowable power dissipation p d max 100 ta = 85 c mw operating temperature t opr - 30 to +85 - c storage temperature t stg - 40 to +125 - c
53 segment static dr iver S6A0035 7 electrical character istics dc characteristics (v dd =2.7v to 6,5v, v ss = 0v, v lcd = 2.7v - v dd , ta = - 30 to + 85 c) characteristics symbol test conditions min typ max unit operating voltage v dd - 2.7 - 6.5 driver supply voltage v lcd - 2.7 - v dd input "high" voltage 1 v ih1 ce, ck, di, inh 0.8v dd - v dd v input "low" voltage 1 v il1 0 - 0.2v dd input "high" voltage 2 v ih2 s44, s46 0.8v dd - v dd input "low" voltage 2 v il2 output off (used input pin dsp1, dsp2) 0 - 0.2v dd input "high" current 1 i ih1 ce, ck, di, inh (v i = v dd ) - - 5.0 input "low" current 1 i il1 ce, ck, di, inh (v i = 0v) - - 5.0 m a input "high" current 2 i ih2 s44, s45, s46, s47(v i = v dd ) - - 10.0 input "low" c urrent 2 i il2 s44, s45, s46, s47 (v i = 0v) - - 10.0 output "high" voltage 1 v oh1 s1 - s53(v lcd =3v, i o = - 10 m a) v lcd - 0.5 - - output "low" voltage 1 v ol1 s1 - s53(v lcd =3v, i o =+10 m a) - - 0.5 output "high" voltage 2 v oh2 com1, com2 (v lcd =3v, i o = - 100 m a) v lcd - 0.6 - - output "low" voltage 2 v ol2 com1, com2 (v lcd =3v, i o = +100 m a) - - 0.6 medium voltage v m1 com1, com2 (v lcd = 6.5v, i o = 100 m a) 2.65 3.25 3.85 v m2 com1, com2 (v lcd = 3.0v, i o = 100 m a) 0.9 1.5 2.1 first step lighting voltage v a1 s45, s47 0.07v dd 0.1v dd 0.13v dd v second step lighti ng voltage v a2 s45, s47 0.17v dd 0.2v dd 0.23v dd third step lighting voltage v a3 s45, s47 0.27v dd 0.3v dd 0.33v dd fourth step lighting voltage v a4 s45, s47 0.37v dd 0.4v dd 0.43v dd fifth step lighting voltage v a5 s45, s47 0.47v dd 0.5v dd 0.53v dd step vol tage difference v step s45, s47 (refer to fig. 2) 0.09v dd 0.1v dd 0.11v dd oscillation frequency f osc osc (r = 51k w , c = 680pf) 40 50 60 khz operating current i dd1 v dd = 3v f ck = 2mhz - 0.2 0.4 i dd2 v dd = 6.5v r = 51k w - 0.4 0.8 ma driving current i lcd1 v lcd = 3v c = 680pf - 0.6 1 i lcd2 v lcd = 6.5v - 1.2 2
S6A0035 53 segment static driver 8 ac characteristics (v ss = 0v, v dd = 2.7v to 6.5v, v lcd = 2.7v - v dd , ta = - 30 to + 85 c) characteristic symbol test conditions min typ max unit clock pulse width t wckh v dd = 5.0v 0.25 - - t wckl v dd = 5.0v 0.25 - - data set - up time t su v dd = 5.0v 0.25 - - data hold time t dh v dd = 5.0v 0.25 - - ce - di time 1/1 duty t 1 v dd = 5.0v, at ce rising 1/2 duty t 11 v dd = 5.0v, at ce rising 1.0 - - m s t 12 v dd = 5.0v, at di falling 1/1 duty t 2 v dd = 5.0v, at ck rising ce - ck time 1/2 duty t 21 v dd = 5.0v, at ck rising 1.25 - - t 22 v dd = 5.0v, at ck ri sing ce disable time 1/2 duty t 3 v dd = 5.0v, at ce falling 4.0 - -
53 segment static dr iver S6A0035 9 timing characteristi cs 1/1 duty (56 bits) ~ ~ ~ ~ ~ ~ ~ ~ t wckh t wckl t 2 dr dq d2 d1 t 1 t su t dh t su t dh ce ck di 1/2 duty (112 bits) t wckh t 21 t 22 dr d54 dr d1 t 11 t su t dh ce ck di t su t dh t 3 t 12 ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ figure 1. ac characteristics
S6A0035 53 segment static driver 10 ou tput waveform com1 s1-s53 -. 1/1 duty f osc /512 (hz) unlighting time lighting time v lcd 0v v lcd 0v -. 1/2 duty com1 com2 v lcd 1/2 v lcd 0v v lcd 1/2 v lcd 0v f osc /512 (hz) v lcd 0v v lcd 0v v lcd 0v v lcd 0v s1-s52 output for segment when com1 side is lighted. s1-s52 output for segment when com2 side is lighted. s1-s52 output for segment when com1 & com2 side are lighted. s1-s52 output for segment when com1 & com2 side are unlighted.
53 segment static dr iver S6A0035 11 block function clock generator the oscillator is operated by connecting external resistor and capacitor. the clock of oscillator block is used as signal of common and segment driver. function decoder function de coder generates, using chip enable (ce), data (di), clock (ck) from controller, a signal which controls the function and mode of chip. for example ad / dsp function , drive mode, latch clock select and so forth. d1 d2 d3 d4 d5 d6 d7 d8 d47 d48 d49 d50 d51 d52 d53 dp dq dr data transfer (56 bits) dp : drive mode s elect bit ? 1 / 1 duty at "0" , 1 / 2 duty at "1" , dq : ad / dsp function select bit ? segment output at "0" ad / dsp function at "1". dr : latch clock select bit ? latch1 clock at "0", latch 2 clock at "1". note: if ad / dsp function selected are not in use, ari, ali, dsp1, dsp2 pins are connected to vdd or vss in order to protect floating.
S6A0035 53 segment static driver 12 shift register shift register consists of 53 data bits for display and 3 bits for function / mode select. data transfer mode 1/1 duty d1 d2 d3 d4 d5 d6 d7 d8 d47 d48 d49 d50 d51 d52 d53 dp dq dr data transfer (56 bits) 1/2 duty d1 d2 d3 d4 d5 d6 d7 d8 d47 d48 d49 d50 d51 d52 d53 dp dq dr data transfer (112 bits) d54 d55 d56 d57 d58 d59 d60 d61 d102 d103 d104 d105 d106 x x 1 d62 * d53, d106: dummy bit ( do not care) * x: don't care - d1 - d53: display data (1 / 1 duty) ? lighted at "1" - d1 - d106: display data (1 / 2 duty) ? unlighted at "0" note: if ad / dsp functions are selected. 1/1 duty: d46 - d53 ? dummy bit (don't care ) 1/2 duty: d88 - d10 6 ? dummy bit (don't care )
53 segment static dr iver S6A0035 13 the example of data transfer d1 d2 d3 d52 -. 1/1 duty d53 0 dq 0 . under 52 segments at 1/2 duty d1 d2 d3 d52 d53 1 dq 0 . over 52 segments at 1/2 duty d1 d2 d3 d52 d53 1 dq 0 d54 d55 d56 d105 d106 x x 1 . under 52 segments at 1/2 duty, data can not be transferred as below figure. d54 d55 d56 d105 x x 1 d106 adc ( analog to digital converter ) 0.5v dd 0.4v dd 0.3v dd 0.2v dd 0.1v dd v step v step v step v step v step figure 2. step voltage difference input v oltage on s45 (ali), s47 (ari) note: a dc consists of two analog inputs (ari, ali ) and two adcs for level meter, and converts a analog input to 5 - level digital data in order to drive level meter.
S6A0035 53 segment static driver 14 common driver com1 -. 1/1 duty f osc /512 (hz) v lcd 0v -. 1/2 duty com1 com2 v lcd 1/2 v lcd 0v v lcd 1/2 v lcd 0v latch and segment dr iver latch has two signal, latch 1 clock latches d1 to d52 in 1/1 duty mode or 1/2 duty mode. latch 2 clock latches d54 to d105 in 1/2 duty mode d53 and d106 mean dummy bits ( don ' t care ) at 1/2 duty mode if ad/dsp function is selected, s44 to s47 are input pins, s48 to s53 are output pins.
53 segment static dr iver S6A0035 15 correspondence betwe en transfer (externa l input) data and ou tput pin dp 0 1 dq 0 1 0 1 com1 com2 output 1 / 1 duty 1 / 2 duty s1 d1 d1 d1 d1 l d2 d2 l s2 d2 d2 d3 d3 l d4 d4 l s3 d3 d3 d5 d5 l d6 d6 l . . . . . . . . . . . . . . s26 d26 d26 d51 d51 l d52 d52 l s27 d27 d27 d54 d54 l d55 d55 l s28 d28 d28 d56 d56 l d57 d57 l . . . . . . . . . . . . . . s43 d43 d43 d86 d86 l d87 d87 l s44 d44 d44 d88 *dsp2 l d89 l s45 d45 d45 d90 *ali l d91 l s46 d46 *dsp1 d92 *dsp1 l d93 l s47 d47 *ari d94 *ari l d95 l s48 d48 *dspo1 d96 *dspo1 l d97 *dspo2 l s49 d49 *aro1 d98 *aro1 l d99 *alo1 l s50 d50 *aro2 d100 *aro2 l d101 *alo2 l s51 d51 *aro3 d102 *aro3 l d103 *alo3 l s52 d52 * aro4 d104 *aro4 l d105 *alo4 l s53 d53 *aro5 always lighting *aro5 l always lighting *alo5 l note: in case of 1 / 1duty, only com1 is used. dsp1, dsp2: external display input data dspo1, dspo2: external display output data ari, ali: ad converter input data aro1 to 5, alo1 to 5: ad converter output data.
S6A0035 53 segment static driver 16 application circuit application c ircuit 1 + 680pf 51k w r c 0.1 m f v lcd v dd from controller osc v dd inh v lcd v ss ce ck di S6A0035 application circuit 2 + 680pf 51k w 0.1 m f v dd from controller osc v dd inh v lcd v ss ce ck di S6A0035

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